🥳Excited to share our new paper: "Minimum Weight Decoding in the Colour Code is NP‑hard"

We prove there's no algorithm to find the best way to correct errors in reasonable time for the colour code

So, let’s focus on heuristic/approx algorithms: scirate.com/arxiv/2603.0... @marklt.bsky.social

🎉 It's publication day! 🎉

Congrats to the team for a new @prxquantum.bsky.social paper where their 'ghost protocol' speeds up QEC cycle speeds 10x for AMO qubits 👻

journals.aps.org/prxquantum/a...

👏 Mark Turner, @quantumearl.bsky.social, Ophelia Crawford, Neil Gillespie, and Joan Camps

Nice article, exciting times indeed! :)

There is probably some generalisation of resilience that also explains why in arXiv:2505.13587 and arXiv:2505.13599 it is possible to create a restricted subgraph that welds together the DEMs of separate logical qubits and also be resilient to fast logic and proximate open temporal boundaries.

This extra defect is, therefore, enough to correct d/2 errors in a global hypergraph setting, and what we call patient ghost decoding gets very close to this while enabling full windowing.

This single defect is strong evidence of an order three hyperedge as the only other explanation for a single defect in the bulk of a patch is a (potentially long) string of errors to the boundary.

Practically, when a string of measurement errors pierces through the time layer in which a transversal CNOT happened a further single defect appears on another logical qubit with which entanglement was created.

Resilience works, because of the way errors propagate through transversal CNOTs and yield more defect information than regular errors. Transversal CNOTs mean errors are no longer genuinely string like in the surface code and the extra information creates redundancy.

Fortunately, the transversal CNOT, which can form part of a T gate by teleportation, yields a decoding problem with a structure that enables small, constant sized buffer regions so we say the logic is resilient.

With commit-buffer style windowing we usually expect to need buffer regions of size that scales linearly with our code distance. When performing T gates we would like to escape from this requirement, otherwise (state preparation aside) our logical gate will also take O(d) time.