There was no microprocessor in the Space Shuttle computer. The CPU consisted of three boards of fairly simple logic chips.

Why the 4 Pi name? IBM's System/360 mainframes supported a full 360º circle of applications, from business to scientific. The 4 Pi aerospace computers, however, were designed for the 3-D world, a "sphere" of applications. A circle has 360º, but a sphere has 4π steradians of solid angle.

It's a bit confusing. Core memory (RAM) was used by most computers in the 1960s. Core rope (ROM) was used by the Apollo Guidance Computer and not much else. Core memory was assembled by automated machines until IBM discovered labor in Asia was cheaper. Rope was made by hand with some assistance.

The rise and fall of IBM's 4 Pi aerospace computers: an illustrated history The morning of April 12, 1981, 20 years to the day after Yuri Gagarin became the first person in space, the Space Shuttle thundered into the...

There were many more models of System/4 Pi computers; my article has a detailed history and many photos: www.righto.com/2026/03/ibm-...

One of the CPU boards from the AP-101S, specifically the CPU1 board. It is full of flat-pack integrated circuits in a 10 by 18 grid; some are black and some are white. If you look closely, you can see "bodge wires" that correct errors on the board. The nine large ICs in the center are four-bit arithmetic-logic unit chips (74F181) for the 36-bit "fraction" ALU. Much of the logic uses FAST (Fairchild Advanced Schottky Technology) TTL chips for improved performance. The board is covered with brown conformal coating to protect it from the environment.

In 1991, the Space Shuttle upgraded its computer to the AP-101S, replacing two 60-pound boxes with one box. With five computers on the Shuttle, this change freed up 300 pounds for additional cargo. The CPU was implemented in three boards full of chips, much larger than the earlier 4 Pi boards.

The Space Shuttle I/O Processor (IOP, left) and AP-101B computer (right). Each is a 60-pound gray metal box with round military-style connectors on the front and black U-shaped handles. Photo courtesy of RR Auction.

The Space Shuttle's EP/MCM (Extended Performance/Modular Core Memory) module. The board has dozens of gold-plated flat-pack integrated circuits as well as other components such as cylindrical diodes. The board unfolds, with the core planes inside, so the core memory itself is not visible. Photo from klabs.

The Space Shuttle used a more advanced System/4 Pi computer called the AP-101B. A separate computer, the I/O Processor, provided 24 data buses to all parts of the Shuttle. These boxes still used individual TTL chips and magnetic core memory.

The arithmetic and control subassembly of a TC computer, configured for a tactical missile. The board is a semicircle with about 100 thumbnail-sized integrated circuits mounted on it. From Electronics, March 6, 1967.

A standard IBM System/4 Pi page assembly. This is a rectangular circuit board with flat-pack integrated circuits mounted in a 5 by 17 grid. It has two 98-pin connectors at the bottom, identical to the connectors used on the Saturn V rocket's Launch Vehicle Digital Computer. At the top of the board, two metal flanges have thumbscrews for mounting. Photo from "AWACS Data Processing Subsystem" brochure, 1991.

IBM's 4 Pi computers were built from simple TTL integrated circuits and used magnetic core memory for storage. The board below was round to fit inside a tactical missile, but most of the computers used standardized rectangular boards called "pages".

The TC-2 computer was used on the A-7 Corsair II aircraft. The computer is a gray box, a bit under a cubic foot. It has round military-style connectors on the front, as well as a black fan. It has stencilled text: "Caution: Weight over 60 pounds", "Grip Area Underneath". The fan has a red warning label: "No step. No lift. High temperature." Photo courtesy of Alex1970-14.

The AP-101S is the upgraded Space Shuttle computer. It is a rectangular metal box with U-shaped metal handles on the front, as well as round military-style connectors. The cover is removed, revealing about a dozen large circuit boards inside, as well as a large bundle of yellow and black wires.

In 1967, IBM introduced the System/4 Pi line of aerospace computers, packing mainframe performance into a compact box. 4 Pi computers powered everything from military aircraft to the Space Shuttle to sonar systems on submarines. Thread...

I don't see any specific parts of the 8087 that would run hot. (Although the ROM is a weird semi-analog circuit that stores two bits per transistor, so maybe it needs more current.) Most likely, the 8087 runs hotter because it has significantly more transistors than the 8086/88.

Instruction decoding in the Intel 8087 floating-point chip In the 1980s, if you wanted your IBM PC to run faster, you could buy the Intel 8087 floating-point coprocessor chip. With this chip, CAD so...

Instruction decoding in the 8087 has many more complications: hardcoded instructions handled by the "Bus Interface Unit", instructions that load a constant from the constant ROM, and handling the instruction queue. For more details, see my latest blog post: www.righto.com/2026/02/8087...

A die photo of the Jump PLA. The left side is a large grid of transistors, with some transistors missing. It acts as a ROM that holds the jump addresses, and outputs an 11-bit address at the top. The right sigde of the image is the decoder. It takes the jump number, decodes it, and activates a horizontal. At the upper right, some logic gates are the "operation logic", determining what operation is being performed . This handles the special "jump 0".

Most of the instructions in the 8087 are implemented in low-level software called microcode. The microcode inside the 8087 chip uses conditional jumps for many purposes including changing the behavior for different instructions. Here's the PLA that stores target addresses for microcode jumps.

A close-up of the instruction decoding PLA. It shows part of the grid of transistors. One transistor is highlighted in green, while a red highlight shows where a transistor is missing. At the top, pull-up transistors pull the outputs high by default.

ike many processors, the 8087 uses a "Programmable Logic Array" (PLA) to decode the bit patterns in instructions. A PLA consists of grids of transistors, with some of the transistors missing. This grid is dense and flexible; the pattern of transistors controls the PLA's function.

A die photo of the 8087 chip, with the main functional blocks labeled. The chip is a tan rectangle with complex patterns in dark brown. Many of the patterned regions are textured rectangles. One of the largest rectangles is the microcode ROM in the middle. The bottom half of the chip is the datapath, performing operations on floating-point numbers. The instruction decoding happens in the upper left. Around the edges of the chip, bond wires connect the chip to the 40 external pins, but the pins are not visible, just short segments of the bond wires.

In 1980, Intel released the 8087 floating-point chip, making math much faster. I'm reverse-engineering this chip, 46 years later. Most of its instructions are implemented in microcode, but some are implemented in hardware. Let's look at the circuitry that decodes instructions and decides what to do.

Notes on the Intel 8086 processor's arithmetic-logic unit In 1978, Intel introduced the 8086 processor, a revolutionary chip that led to the modern x86 architecture. Unlike modern 64-bit processors,...

For more, see my latest blog post:
www.righto.com/2026/01/note...

A close-up of the ALU control circuitry in the 8086. In this die image, I removed the metal layer to show the underlying silicon and polysilicon. I've labeled the temporary register latch, the XI multiplexer, the operation PLA, the operation latch, the lookup table PLA and miscellaneous decoding circuitry.

The 8086 processor uses microcode to specify each step of an instruction. The circuitry below decodes the microcode and sends control signals to the ALU so it performs the desired arithmetic or logic operation. In this die photo, you can see the individual transistors in the circuitry.

A die photo of the 8086 microprocessor. The image shows a tan square with complex patterns of beige and dark lines showing the circuitry. Thicker light lines distribute power across the chip while black bond wires are attached around the edges. Various regions with different patterns are labeled with their function including a large rectangular region in the lower right that holds the microcode and the 16-bit ALU in the lower left. The ALU Control circuit at the bottom is highlighted.

The arithmetic/logic unit (ALU) in the Intel 8086 processor (1978) is more complicated than you might expect, performing 28 different operations from addition and logical AND to shifts and BCD adjustment. A special control circuit reconfigures the ALU for each operation. Let's look closer...

Conditions in the Intel 8087 floating-point chip's microcode In the 1980s, if you wanted your computer to do floating-point calculations faster, you could buy the Intel 8087 floating-point coprocessor ...

Intel announced the 8087 floating-point chip in 1980. Now I have a blog post that explains a small part of the microcode in this chip.
www.righto.com/2025/12/8087...

The 8087 was much more advanced than previous floating point. In particular, it was designed by Prof. Kahan, a floating-point expert, and was much more rigorous and accurate. It became the IEEE 754 standard, which almost all computers now use.
ieeemilestones.ethw.org/Milestone-Pr...

I looked at the AM9511 datasheet. It's similar to the 8087 in that they are both floating-point chips that do arithmetic as well as transcendental functions, and both use a stack. However, the 9511 uses 16/32-bit floats, while the 8087 uses much larger floats, up to 80 digits.

No, I haven't looked at that chip yet.

The stack circuitry of the Intel 8087 floating point chip, reverse-engineered Early microprocessors were very slow when operating with floating-point numbers. But in 1980, Intel introduced the 8087 floating-point copro...

For more on the stack circuitry in the 8087, see my blog post: www.righto.com/2025/12/8087...

A close-up of the 8087 die. There are white horizontal and vertical lines of various widths, the chip's metal wiring. Text in metal is also visible: "8087", "i/IL", and a maskwork/copyright marking: "(m) (c) intel 1980".

Intel was hesitant to produce the 8087 chip, considering it complex, risky, and with an unknown market. Intel's Israel site took on the project; the die is marked "i/IL". The chip was a highly profitable success. Now, almost all computers use floating-point systems based on the 8087.

A block diagram from the patent. It shows the top-of-stack pointer (TOS) with controls to increment and decrement when pushing or popping values. A subtractor circuit computes offsets into the stack. A multiplexer selects either the top-of-stack or the offset value. A decoder selects one entry in the stack based on this value. The value in the stack is split across the fraction bus, exponent bus, and tag bus.

The stack control circuitry on the die. It consists of complex silicon structures forming tan patterns. I've labeled regions of the circuitry. Circuitry blocks handle increment/decrement and latching of the three bits. Underneath, blocks compute the sum and multiplex the two values. There are irregular regions of deep blue at the right. These are not significant, just oxide that didn't get completely removed when I dissolved the metal layer with acid.

A complicated schematic showing one bit of the stack register control. The left half is a flip-flop that can hold a bit or toggle the bit (for incrementing or decrementing). The right half is a multiplexer to select either the top-of-stack from the flip-flop or the sum. The summing circuitry is not shown, but uses a carry-lookahead adder.

This diagram, based on the 8087 patent, shows the implementation of the stack. You saw the registers (yellow) earlier. This photo shows the three-bit circuitry that controls the stack (purple, green, and blue). The schematic shows one bit in detail.

A diagram showing two inverters in a loop. On the left, the first inverter has a 0 and the second has a 1. On the right, the values are switched. Thus, the circuit can hold a 0 or a 1.

A close-up of the silicon showing the circuitry for one storage cell. Each cell has two inverters. Each inverter has a transistor and a weak pull-up transistor. A transistor is formed when polysilicon crosses over doped silicon. The two inverters are connected to bit lines to read and write the cell. This connection is through two selection transistors, controlled by a vertical word line.

Each bit is stored in a "static RAM" cell, consisting of two inverters in a loop. This circuit has two stable states, holding a 0 or a 1. The implementation is complicated: silicon with polysilicon lines on top to make transistors. Horizontal metal wires connect everything.

The registers in the 8087 chip form a tall, skinny rectangle. The storage cells are arranged in eight columns for the eight registers. At the top are two tag bits, then 16 bits for sign and exponent, and then 64 bits for the fraction part of the number. The image zooms in on an 8 by 8 block of storage cells. For this image, I removed the metal layer with acid, so you can see the silicon structures underneath. The silicon appears pinkish-tan.

Unlike most processors, the 8087 organizes its registers into a "stack", pushing numbers onto the top of the stack and popping them off. Here's a close-up of the eight registers, organized in a grid of cells. Each register holds an 80-bit number, so the registers are very tall.

A photo of the 8087 die under a microscope. The die is rectangular, with complex patterns in purplish-brown. The patterns consist of rectangular regions, striped regions in the bottom half of the chip, and other more irregular regions. At the right, two regions are highlighted in red: the registers and the stack control circuitry. Around the edges of the die, you can see the hair-thin bond wires that connect the chip to its 40 external pins. The complex patterns on the die are formed by its metal wiring, as well as the polysilicon and silicon underneath. The bottom half of the chip is the "datapath", the circuitry that performs calculations on 80-bit floating point values. At the left of the datapath, a constant ROM holds important constants such as π. At the right are the eight registers that form the stack, along with the stack control circuitry. The chip's instructions are defined by the large rectangular microcode ROM in the middle.

In 1980, Intel announced the 8087 Math Coprocessor, a chip that made floating-point 100 times faster. I opened up the chip, took photos of the silicon structures, and analyzed its circuitry. It's a very complex chip for its time. Let's take a look inside...

Not yet...

Unusual circuits in the Intel 386's standard cell logic I've been studying the standard cell circuitry in the Intel 386 processor recently. The 386, introduced in 1985, was Intel's most complex pr...

My latest blog post describes the wayward transistor and two other curiosities in the 386 processor's standard cell logic, so read it for details.

www.righto.com/2025/11/unus...

A standard-cell inverter as it appears on the die, along with a diagram explaining the layout. The die image has green lines of polysilicon over grayish rectangles of silicon that look a bit like Lego bricks. The diagram shows how the inverter is constructed from a PMOS transistor and an NMOS transistor

Standard cells sped up the design of the 386 and the chip was completed ahead of schedule. Pat Gelsinger was one of the key people behind the use of standard cells in the 386 processor. Decades later, he became CEO of Intel.

A close-up of two columns of standard cell logic. I dissolved the metal layers with acid for this photo, so you can see the silicon. Each transistor has a dark outline around it. The transistors are all in columns except for one lone transistor between the columns; it is marked with a red arrow. The photo also has a few large greenish regions. These are areas where I couldn't remove the oxide layer completely, so they can be ignored.

In standard cell logic, all the transistors are in orderly stripes. Except one that's out of place below, in the middle of the wiring region. What's going on? I think it's a bug fix. Instead of redoing all the circuitry, someone realized they could patch an extra transistor into an empty spot!