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Posts by eric

A dialog window in KiCad with a tree widget on the left showing a view of various rule categories with rules in them, the selected rule is "ignore_usb_silk_clearance" in the Manufacturability->Silk Clearance->Silk to silk clearance category. On the right side is a graphic explaining what silk to silk means and then a value of the clearance set to 0.00 mm. Under that are the conditions of the rule, it's for connector J1 and the Edge Cuts layer.

A dialog window in KiCad with a tree widget on the left showing a view of various rule categories with rules in them, the selected rule is "ignore_usb_silk_clearance" in the Manufacturability->Silk Clearance->Silk to silk clearance category. On the right side is a graphic explaining what silk to silk means and then a value of the clearance set to 0.00 mm. Under that are the conditions of the rule, it's for connector J1 and the Edge Cuts layer.

The new Design Rule Editor in @kicad.org nightly is looking good 😍

3 months ago 26 2 2 0

!!!! FINALLY !!!!!

3 months ago 0 0 0 0

You’re right, but the Bluesky post text is what is sensationalist. My bad.

Keep on with the both sides bad argument tho. That’s worked out real well 👍

3 months ago 0 0 1 0

NO IT DOES NOT. Holy fuck you people have no reading comprehension.

4 months ago 0 0 1 0

You’re legitimately arguing pointing out biased and bad reporting is bad? That’s no better than Fox News.

4 months ago 0 0 0 0

Just because it supports YOUR viewpoint doesn’t mean it’s not sensationalist.

4 months ago 0 0 1 0

bsky.app/profile/robp...

4 months ago 0 0 2 0
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4 months ago 0 0 2 0

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4 months ago 0 0 2 0

The entire point of this silly discussion is that Al Jazeera is no better than the NYP or Fox News for biased “reporting.” Stick to the AP.

4 months ago 0 0 0 0

They most certainly changed the headline which is what this entire thread is about (about mentioned several times, not the subtitle). The headline specifically mentioned Obama. Just bc Time Machine didn’t save the original doesn’t mean it didn’t exist.

4 months ago 0 0 4 0

Taking a break from a project to start* another 😅

4 months ago 0 0 0 0

Taking a break from one project to finish another, you mean? 😌

4 months ago 0 0 1 0

Reading comprehension please.

Btw, Al Jazeera changed the headline to more accurately reflect the article. So yes it was sensationalist.

4 months ago 0 0 2 0

Those two things are not mutually exclusive, holy shit. War crimes = bad. Sensationalist headline that is obviously biased = also bad.

4 months ago 0 0 1 1

Cat

4 months ago 1 0 0 0

>points out sensationalist headline
>instantly accused of supporting war crimes

You sound ridiculous honestly.

4 months ago 2 0 1 0
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They’re doing the thing

4 months ago 10 0 2 0

Woohoo! 6 & 8 layer Aisler PCBs!

5 months ago 2 0 0 0

Wear a smart watch that vibrates?

5 months ago 1 0 0 0

(RPi FPGA SOC when?!)

5 months ago 0 0 1 0

I just got a RPi based logic analyzer that can sample at 200 MHz for a short period of time, so I guess it is possible. To your point though, processing will be the bottleneck

5 months ago 2 0 1 0

Resistance check rails before power on too!

5 months ago 2 0 0 0

I really enjoyed the circuits 2 lab for this reason where we actually built amps and other stuff

5 months ago 2 0 1 0
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They spend all of 6 seconds explaining what a FET or BJT actually is (if you’re lucky) before jumping into small signal analysis for the next 3 lectures

5 months ago 2 0 1 0

The new bsky logo 🤮

5 months ago 0 0 0 0
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The official home of the Python Programming Language

TLDR; The PSF has made the decision to put our community and our shared diversity, equity, and inclusion values ahead of seeking $1.5M in new revenue. Please read and share. pyfound.blogspot.com/2025/10/NSF-...
🧵

5 months ago 6406 2748 123 450

I did a pcie gen4 board two years ago which was cool, but relatively simple

5 months ago 0 0 0 0

I don’t really want to leave my job but I keep getting assigned less interesting boards to make (like a front panel board). The first real board I made here was the most advanced one I did, (18L, blind/buried vias) since then, like 4 years ago, it’s been not career-advancing stuff

5 months ago 1 0 1 0
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ADDED: Ability to create flat-type schematics (ac8914e4) · Commits · KiCad / KiCad Source Code / kicad · GitLab Allows multiple, top-level schematic sheets. Records of the sheets are stored in the project file. All top-level sheets live under a virtual root sheet in the hierarchy. This virtual root...

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gitlab.com/kicad/code/k...

6 months ago 15 2 3 0