#Intel released the 61st edition of the ISA Extensions Reference with PerfMon Masking and clarifications.
Download:
cdrdv2-public.intel.com/915637/31943...
#DiamondRapids #NovaLake #WildcatLake #PantherCove #CoyoteCove #ArcticWolf
CPUID.07h.01.EDX[22]= #SEC_TEE_ATTESTATION

My quick note about #Intel
#ArrowLake CPUID C0662 #LionCove
and
#PantherLake CPUID C06C3 #CougarCove
instruction level differences

I hope this is because all resources were directed towards developing #CoyoteCove / #PantherCove in #NovaLake and #Diamondrapids.

#Intel released the 60th edition of the ISA Extensions Reference with official announcement of #AVX10 and #APX support on #NovaLake, and FP8 type clarifications.
Download:
cdrdv2-public.intel.com/869288/31943...
#DiamondRapids #NovaLake #WildcatLake #PantherCove #CoyoteCove #ArcticWolf

#Intel re-released the 59th edition of the ISA Extensions Reference with #USER_MSR clarification:
Download:
cdrdv2-public.intel.com/865891/31943...
#DiamondRapids #NovaLake #WildcatLake
#PantherCove #CoyoteCove #ArcticWolf

#Intel released the 59th edition of the ISA Extensions Reference with some #PantherCove, #CoyoteCove and #ArcticWolf microarchitecture details:
#DiamondRapids #NovaLake #WildcatLake

Download:
cdrdv2-public.intel.com/865891/31943...

#AMX_TRANSPOSE removed

I just finished my first meaningful #APX code path: #SHA3 / #Keccak1600 on 32 GPR registers: Only 130 uops + a few MOVs. I wonder if it can beat the latency of 35+ uop #AVX512 version on #Intel #DiamondRapids.
#Novalake , #PantherCove , #CoyoteCove