Excited that we are offering a new Chip Design Capstone course for undergraduates at @ucsantacruz.bsky.social next year. I'm excited to offer this to opportunity! #semieda #chipdesign
courses.engineering.ucsc.edu/courses/cse1...
courses.engineering.ucsc.edu/courses/cse1...
Yet again, I run into the problem that a crappy #semiEDA tool wrapper can't properly handle multi-token arguments (i.e. `wrapper --tool-arg 'some value'` leads to something like `tool --arg some value`). I'm getting pretty sick and tired of running into this again and again and again.
SE's latest Low Power-High Performance newsletter
semiengineering.com/newsletter/l...
#semiEDA #lowpower #semiconductor #analog #chiplets #NPUs #SRAM #AI
What I learned about Electrical Rule Checking in PCB designs, blog at #SemiWiki semiwiki.com/eda/siemens-... #SemiEDA
System engineers doing SoC projects should see what's happening with SystemC. #SemiWiki #SemiEDA semiwiki.com/semiconducto...
Catch up on this week's news in the chip industry semiengineering.com/chip-industr...
#semiconductor #semiEDA
It is, but there's definitely a big hole where corporations and decision-makers used to be at the other place so far, a few #semiEDA peeps are already lamenting this. Engagement is better *if* enough of a community is here. Going to take time.
I blog about #SemiEDA and #SemiIP at #SemiWiki. A popular page lists all open source EDA tools, semiwiki.com/wikis/indust...
A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.
semiengineering.com/shift-left-i...
#semiEDA #semiconductor #chipdesign