#VLSID2026 - Chandan Kumar Jha from @unibremen.bsky.social presenting on "DIVIAC: Library of Input Data Aware Approximate Dividers with Partial Exact Minimization" at VLSI Design 2026; paper available #online agra.informatik.uni-bremen.de/doc/konf/VLS... #VLSID #VLSIConference

#VLSID2026 - Chandan Kumar Jha from @unibremen.bsky.social presenting on "PolyEMAC: Polynomial Error Metrics Analysis in Approximate Computing" at VLSI Design 2026 in #India; paper available #online agra.informatik.uni-bremen.de/doc/konf/VLS... #VLSID #VLSIConference

#VLSIDesign2025 - Winner of the Student Research Forum at @vlsidcon.bsky.social 2025: Sajjad Parvin from @unibremen.bsky.social
vlsid.org/detailed-age... #vlsid #vlsid2025 #vlsidesign @dsc-ub.bsky.social @dfki.bsky.social #security

#VLSIDesign2025 - Chandan Kumar Jha from @unibremen.bsky.social will talk about "FARAD: Automated Formal Verification of Approximate Restoring Array Dividers" at @vlsidcon.bsky.social vlsid.org/detailed-age... #vlsid #vlsid2025 #vlsidesgin @dsc-ub.bsky.social @dfki.bsky.social #verification #formal

#VLSIDesign2025 - Sajjad Parvin from @unibremen.bsky.social presenting on "True-PolyTronik: Securing Circuits Against Laser Logic State Imaging Attack Using RFET" at @vlsidcon.bsky.social vlsid.org/detailed-age... #vlsid #vlsid2025 #vlsidesgin @dsc-ub.bsky.social @dfki.bsky.social #security #RFET