What lead you to these fascinating facts?

16 colour image of crocuses in grass with the wrong palette. The flowers are green and blue while the grass is bright pink, purple, and sand coloured.

Sometimes the wrong palette turns out right.

Tayto Cheese & Onion?

Verilog error message of the day: "Illegal character in binary constant: 2". Yes, I'm appalled at myself too.

Thanks. ☺️ digital.archives.caltech.edu/collections/...

Hey, I wrote a thing about AI in astrophysics
ergosphere.blog/posts/the-ma...

Earthrise 2D drawing test image on widescreen monitor driven by an FPGA dev board over HDMI. A mixture of lines, triangles, and circles in greens and oranges.

The drawing engine refactor was getting chunky, so I merged it. If you want to have a play, there are a few (not enough) details on the 🏝️ Isle.Computer blog: projectf.io/isle/2d-draw...

This refactor will allow me to share vram between CPU and drawing engine for the first Isle release. #FPGA

Too tired to sleep? Refactor Verilog 😴

Tonight, I removed the cross product from triangle rendering. This week's refactor added output enable, removed the need for two multipliers, reduced the lines of Verilog by 40, and increased max ECP5 frequency from 85 to 125 MHz.

Fast fills still to do. 🙃

Announcing the second Tiny Tapeout demoscene competition!

Free silicon space for all entrants!

tinytapeout.com/competitions...

Tonight's little 2D engine work simplified internal enable and status signals removing 78 lines of Verilog.

8 files changed, 61 insertions(+), 139 deletions(-)

Next up is tacking cross product removal from triangle rendering.

The 2D graphics engine has grown dynamically. Several areas need work, but they interact, which makes them hard to tackle. Now that I've done enable, I plan to tackle internal shape enable, remove the cross product, and support writing multiple pixels simultaneously (speeding up fills by up to 32x).

Adding an enable signal to 🏝️ Isle.Computer drawing engine was more of a pain than I expected, but we're now ready to share vram access with the CPU. On the plus side, this also allows you to slow the action down so you can see the drawing happen. #FPGA #verilog

I'm considering moving my git repos to #Codeberg (from GitHub). If you have open source projects on Codeberg, I'd be interested to learn from your experience. I host my own web sites, so it's only the core git stuff I need to worry about. 🙏

* support negative numbers in strd_int * optimise strd_int, reducing branches in loop from 3 to 1 * reject invalid hex characters in strx_int :;<=>? (U+003A-0x003F) * add number/string example program software/book/ch06/num_str.s * rename keyboard include to unicode and change constants UNI_ -> UCS_ * add chapter 6 memory map to README

I've just updated 🏝️Isle chapter 6 software. It's exciting to work on big designs and graphics engines, but building a usable computer is about the small things too. #FPGAFriday

github.com/projf/isle/t...

Isle echo program running in Verilator/SDL simulation.

You can find the source code on GitHub (I'm considering moving to Codeberg): github.com/projf/isle

Includes everything you need for:
* Machdyne Lakritz (Lattice ECP5)
* @digilent.bsky.social Nexys Video (Xilinx XC7)
* Radiona #ULX3S (ECP5)
* Verilator simulator with SDL (Linux/macOS/Windows)

Isle.Computer running on ULX3S FPGA dev board connected to monitor showing number guessing game.

Sometimes you need to ship it and call it a night, so I give you 🏝️ Isle.Computer Chapter 6 - Input Output: projectf.io/isle/input-o...

Adds input hardware, uart, Isle edition of FemtoRV "Gracilis" RV32IMC CPU, software library in #riscv asm, Verilator/SDL sim improvements... #FPGA

TFW you realise something obvious. "Somebody to Love" is Queen doing gospel. And what a song it is when turned up to 11.

# each morning I get up, I die a little...

Meta and TikTok let harmful content rise after evidence outrage drove engagement - whistleblowers Companies allowed more harmful content on user’s feeds, knowing their algorithms ran on outrage, BBC hears.

Is anyone surprised by this anymore?

“Around the time when Facebook was arguing that it was just a ‘mirror to society’, internal documents shared with the BBC… reveal how the company knew it was amplifying content which angered people and even incited harm.” www.bbc.co.uk/news/article...

I always think the next chapter of 🏝️ Isle.Computer will be smaller and done sooner, but it never is. 😅

96 changed files with 6,169 additions and 538 deletions.

Bear in mind this includes docs, tests, support for multiple dev boards, simulation, and compiled software in Verilog $readmemh format.

ULX3S FPGA dev board connected to monitor showing number guessing game.

Board testing in advance of #FPGAFriday. The answer was 42. #ULX3S

A Killy Corp memory upgrades advert from 1986. 128 to 512 is $173. 512 to 2 meg is $549.

Macintosh memory is so expensive.
systemtalk.org/post/macinto...

Photograph of page from MacUser December 1985: “VMCO is the Visual/Vocal MAUG Conferencing Utility. It’s a communication program that integrates MacinTalk, Apple’s speech synthesis program, and the conferencing (or group meeting) software…”

Tired of Teams? Meet Macintosh style from 1985 with VMCO.
I wonder if this could be ported to #GlobalTalk? 🤔
systemtalk.org/post/macinto...

Mac History 85.10 - Welcome to Macintosh The creation of the original Macintosh has been extensively studied and written about, but what happened after it launched? What was it like to own a Macintosh in the mid-eighties? I intend to tell th...

Happy #MARCHintosh for those who celebrate. 🥳

You might enjoy my Macintosh history series based on MacUser: systemtalk.org/post/macinto...

No ads, no slop, just classic Mac goodness. ☺️

I‘ve upgraded 🏝️ Isle with the FemtoRV32 "Gracilis" CPU (RV32IMC); it even has interrupt support, which we’ll make use of later. 😄

I’ll release the next Isle chapter soon, with keyboard input and the start of our #RISCV software library. There’s simulation with graphics for Linux/Mac/Windows too.

Ars Technica Fires Reporter After AI Controversy Involving Fabricated Quotes Ars Technica has fired senior AI reporter Benj Edwards following an outrage-sparking controversy involving AI-fabricated quotes.

I’m impressed by Ars Technica. Some will argue they should have acted more quickly, but most publications would have done nothing beyond an empty apology. futurism.com/artificial-i...

Do not mention tabs

A coconut sapling growing on a tropical beach.

If you enjoy my work on 🏝️ Isle.Computer, FPGAs, and RISC-V, consider sponsoring me: projectf.io/sponsor/

You get early access to source code and blog posts, and I send you a newsletter every month or so. Plus, you help me bring these open-source projects to life. ☺️

Number guessing game. The user is asked to guess a number between 1-100 and is told at each step if their guess is too low or too high. Isle.Computer running in a Vertilator/SDL simulation window.

I've added more software to 🏝️ Isle.Computer; all handwritten in bare-metal #riscv asm.The number guessing game exercises a surprising number of low-level features. Source code (on temp branch): github.com/projf/isle/t...

RISC-V Assembler: Multiply Divide Integer multiply and divide instructions form the optional M extension. Making multiplication and division optional keeps the base instruction set simple and reduces the size of the smallest RISC-V co...

Chapter 6 features the FemtoRV "electron" RISC-V CPU. This CPU can multiply and divide all by itself! That comes in handy when converting integers to and from strings, amongst other things.

I've also got a whole blog post on the #riscv mul and div instructions: projectf.io/posts/riscv-...

"Sorry, I think you mean 'portentous', often confused by those with poor taste."