Isle echo program running in Verilator/SDL simulation.
You can find the source code on GitHub (I'm considering moving to Codeberg): github.com/projf/isle
Includes everything you need for:
* Machdyne Lakritz (Lattice ECP5)
* @digilent.bsky.social Nexys Video (Xilinx XC7)
* Radiona #ULX3S (ECP5)
* Verilator simulator with SDL (Linux/macOS/Windows)
ULX3S FPGA dev board connected to monitor showing number guessing game.
Board testing in advance of #FPGAFriday. The answer was 42. #ULX3S
Captured video of the #ULX3S HDMI enclosure sliced 1 mm at a time in Autodesk Fusion for final analysis before publishing.
youtu.be/YLq2PSAgDDE
Isle.Computer running on ULX3S dev board connected to computer monitor over HDMI. The text on the monitor reads: Isle.Computer Hello, hardware friends. Demos look better on a dev board :) Thanks to my sponsors.
And a quick lunchtime shot of 🏝️ Isle.Computer running on #ULX3S.
Simulation may be practical for software dev, but it feels so much better seeing it running on real hardware. This is #riscv asm decoding UTF-8 sent over UART to Isle hardware running on #fpga. Verilog and asm written by hand. 😊
The ULX3S board mounted in a black plastic, 3D printed enclosure half.
My #ULX3S FPGA + ESP32 enclosure for the Elecrow 7 inch HDMI display is coming along well.
Internal USB wire routing and strain relief. Improved external hole alignment. A few remaining anomalies, but looking good!
ULX3S PCB connected to computer monitor showing “Hello, World! This is an Isle FPGA Computer UART test.”
Work on 🏝️ Isle #FPGA computer input chapter continues. Here I’m testing UART with #ULX3S dev board.
You can find the open-source designs and instructions for 🏝️ Isle FPGA computer at: github.com/projf/isle
You can run Isle on Linux/Mac/Windows under simulation, and it's really easy to set up.
Plus, there's board support #ULX3S, Machdyne Lakritz, and @digilent.bsky.social Nexys Video.
Isle computer supports machdyne Lakritz, Digilent Nexys Video, and Radiona #ULX3S.
And it's easy to run Isle's simulation; for example on macOS with brew installed:
brew install verilator sdl2
cd isle/boards/verilator/ch04
make
./obj_dir/ch04 # run sim
ULX3S FPGA dev board connected to widescreen monitor showing test text 16 colours.
Isle.Computer hardware text mode on #ULX3S. With 2x scaling and horizontal offset to centre at 1366x768. I’m getting ready to release the next chapter and hardware designs. #FPGA
If you have a Machdyne Lakritz, @digilent.bsky.social Nexys Video, or Radiona #ULX3S #FPGA board, please give the latest 🏝️Isle design a test and let me know how you get on. 🙏
2D drawing blog post: projectf.io/isle/2d-draw...
FPGA board Support: github.com/projf/isle/t...
wolfSSL had an amazing visit to #Radiona! Huge thanks to Goran Mahovlic and the team for the warm welcome and the opportunity to present wolfBoot at the OpenHardware Meet-up. Projects like the #ULX3S #FPGA + #ESP32 are truly inspiring!
@crowdsupply.bsky.social
1/2
LCD panel shows "FLUX FPGA EARTHRISE" in angular, geometric font.
My Earthrise #FPGA drawing engine rendering vector letters on #ULX3S dev board connected to 1024x768 LCD panel via Pimoroni controller board (handles HDMI to FPD-Link LVDS). 🌍
#ULX3S ESP32 updated to ESP32S3! USB is now directly connected to ESP32 so we do not need FTDI. emard already has initial support with drag and drop bitstream.
Circle rendering. Nice and smooth, but there’s an issue with rendering at the top of the screen I need to look into. #FPGA #ULX3S
ULX3S FPGA dev board generating a DVI signal connected to widescreen monitor showing a simple pattern of coloured circles similar to a bearing.
Got a little time over the weekend to experiment a bit with my 2D graphics hardware. #FPGA #ULX3S
VHDL is just more readable than Verilog. But then Ada is a lot more readable than C too. So there's that. #ulx3s #misterfpga
Fearlessly generate your own clocks with Lattice ECP5 #FPGAs and Yosys. Includes worked examples for #ULX3S and easy to adapt to any dev board. Happy #FPGAFriday! @yosyshq.com projectf.io/posts/ecp5-f...
ULX3S FPGA dev board connected to LCD monitor with HDMI cable. Monitor shows test pixels, lines, and circles in several colours.
Simulation is all well and good, but nothing beats running on real hardware. Graphics instruction decoding test on #ULX3S #FPGA dev board.
Ah, a #ulx3s. Have several myself.
I've just added #ULX3S (ECP5) board support to my Racing the Beam #FPGA graphics tutorial and designs: projectf.io/posts/racing...
I recently added Beginning FPGA Graphics support for Radiona #ULX3S in addition to the @digilent.bsky.social Arty / Nexys Video, and iCEBreaker. Four years after it began, I continue to update this series to make #FPGA development accessible. 👷 projectf.io/posts/fpga-g...
