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A Rust compiler builds a working RISC-V CPU in Factorio! This wild project exposes the hidden "abstraction cost" and physical realities of hardware design. Mind-blowing engineering!

thepixelspulse.com/posts/verilog-factorio-c...

#verilog #factorio #riscv

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Twitch Twitch is the world

Demain dimanche 8h (CEST, pas CET😉) on continue d'explorer les #FPGA avec #LiteX. Au menu, du C, une pointe d'ASM et de l'édition de liens pour l'incontournable HelloWorld sur notre SoC #RISCV.
Et ça se passe ici : www.twitch.tv/lefinnois_

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Oh wow @plausible analytics running on #RISCV #NixOS, going to upstream additional patches 👍

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Lilbits: The Mac Pro reaches the end of the line Apple is pulling the plug on the Mac Pro, more than 20 years after launching its first high-performance desktop computer with an iconic "cheese grater" design. The company has released several major updates over the years, but the last big change to the design came in 2019, and the last processor update came in 2023 when the company made the move from Intel to Apple Silicon.

Lilbits: The Mac Pro reaches the end of the line #Alibaba, #Android17, #Apple, #Esp32, #Esp32p4piviewe, #Fanless, #Kubb, #Lilbits, #MacPro, #MacStudio, #Minipc, #Riscv, #XuantieC950

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#RISCV #EmbeddedSecurity #OpenSource

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Original post on mastodon.social

Then something for the #Verilog and #Factorio crowd to bond over: a tool for taking a Verilog chip design and putting into the game... as a functional factory.

Demos of its capabilities go all the way up to a 32-bit #RISCV CPU […]

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Join us at IWOCL 2026 for Paulius Velesko's keynote, chipStar: OpenCL as a Portability Layter for CUDA/HIP Applications

Join us at IWOCL 2026 for Paulius Velesko's keynote, chipStar: OpenCL as a Portability Layter for CUDA/HIP Applications

Keynote at IWOCL 2026: Paulius Velesko presents chipStar — compiling unmodified CUDA/HIP code into OpenCL & SPIR-V fat binaries that run on Intel, AMD, NVIDIA, ARM, and RISC-V hardware. No recompilation needed.

Join us at IWOCL 2026, May 6–8 in Heilbronn […]

[Original post on fosstodon.org]

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After many years upstreaming patches, here's our small but extensive #RISCV #NixOS homeserver 🤩 project-insanity.org/2026/03/25/this-small-ri...

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Alibaba's RISC-V Chip Shows China's Strategy to Break Free From Western Semiconductor Control Alibaba's XuanTie C950 represents China's strategic effort to build an independent semiconductor ecosystem using open-source RISC-V architecture, avoiding US export controls.

Alibaba's RISC-V Chip Shows China's Strategy to Break Free From Western Semiconductor Control

#Alibaba #Semiconductors #RISCV #China #AusNews

thedailyperspective.org/article/2026-03-25-aliba...

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Banana Pi open source hardware community Product catalogue 2026
drive.google.com/file/d/1FC6W...
#bananapi #opensoruce #SBC #Router #IoT #AI #openwrt #Linux #Android #riscv

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XuanTie玄铁官网 玄铁致力于成为国际 RISC-V 生态引领者。自成立以来,团队持续深耕 RISC-V 技术研发及生态建设,并陆续推出了一系列玄铁处理器,可满足高中低全系列性能需求。玄铁积极拥抱开源,坚持开放创新,已逐渐构建起以 RISC-V 为核心的生态体系,与生态伙伴协同推动 RISC-V 芯片、开发工具、操作系统、应用解决方案等不同层面的软硬一体化发展。

Yum new #RISC_V tech approaching #XuanTie announced their new CPU core the C950 not sure I buy the "Zen" performance they claim but it will be a big bump into the right direction for sure, looking forward to the first board to play with it.

#RISC-V #RISCV

www.xrvm.cn/product/xuan...

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Upcoming ESP32-S31 dual-core RISC-V MCU offers Gigabit Ethernet, WiFi, Bluetooth, and 802.15.4 connectivity - CNX Software It looks like Espressif Systems has a new powerful wireless microcontroller in the works, with the ESP32-S31 sharing some features of the ESP32-P4 and

The #ESP32-S31 is a dual-core #RISC-V MCU with one high-performance core with FPU and SIMD instructions, and one low-power #RISCV core, featuring 62 GPIOs, a Gigabit Ethernet MAC, WiFi, Bluetooth, and 802.15.4 ( #Thread / #Zigbee /#Matter ) wireless, and more

www.cnx-software.com/2026/03/24/e...

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sn-news: #electronics #riscv Ubitium Tapes Out First ‘Universal’ RISC-V Chip www.eetimes.com/ubitium-tape...

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Alibaba's C950 - First RISC-V CPU with Native LLM Inference Alibaba's T-Head division launched the XuanTie C950, a 5nm 3.2GHz RISC-V server chip that sets a new world record for RISC-V single-core performance and natively runs billion-parameter models like DeepSeek V3 and Qwen3.

Alibaba's C950 - First RISC-V CPU with Native LLM Inference

awesomeagents.ai/news/alibaba-xuantie-c95...

#Alibaba #RiscV #AiHardware

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It was an honour today to give a keynote at the #XuanTie #RISCV community conference in Shanghai. Talking about #hpc , the importance of the c920 and some early benchmarking of their latest c950 which looks like an impressive @riscv.org.web.brid.gy capability

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阿里巴巴玄鐵 C950 宣稱奪下全球最高效能 RISC-V CPU 頭銜

阿里巴巴玄鐵 C950 宣稱奪下全球最高效能 RISC-V CPU 頭銜

阿里巴巴玄鐵C950宣稱奪下全球最高效能RISC-V CPU頭銜,SPECint2006分數破70分,整合AI引擎原生支援千億引數模型。
biggo.com.tw/news/202603241022_Alibab...

#玄鐵C950 #RISCV

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Alibaba の XuanTie C950 が世界最高性能の RISC-V CPU の称号を獲得

Alibaba の XuanTie C950 が世界最高性能の RISC-V CPU の称号を獲得

AlibabaのXuanTie C950がRISC-V CPUで世界最高性能を達成。SPECint2006で70ポイント超え、AIモデルもネイティブ実行可能に。詳細は記事本文で。
biggo.jp/news/202603241022_Alibab...

#XuanTieC950 #RISCV

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Original post on kind.social

For folks in the Austin TX #ATX area, we have a #riscv group meeting tomorrow (March 24th) starting 7pm at Diogenes Marketspace (1917 Hydro Dr, Austin, TX 78728) you're welcome to join us, especially if you are in town for #sxsw2026 ! Snacks will be provided, and I'm bringing the new SpaceMIT K3 […]

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Bir prompt ve uygun bir yazıcı ile kendi bilgisayarımızı yapabilecek miyiz? Buna biraz daha zaman var ama kendisinden bir tane daha üreten bir robottan önce bunu görmemiz gerekli.
blog.adafruit.com/2026/03/22/p...
#openhardware #RISCV #AI

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Ubitium UB410: Rekonfigurierbarer Universalprozessor mit RISC-V-Technik Das deutsche Start-up Ubitium meldet das Tape-Out eines CGRA-Prozessors, der sich für Allzweckberechnungen ebenso eignen soll wie für KI und Signalverarbeitung.

Ubitium UB410: Rekonfigurierbarer Universalprozessor mit RISC-V-Technik
#RiscV
heise.de/news/Ubitium-UB410-Re…
Das deutsche Start-up Ubitium meldet das Tape-Out eines CGRA-Prozessors, der sich für Allzweckberechnungen ebenso eignen soll wie für KI und Signalverarbeitung.

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Metas KI-Beschleuniger mit RISC-V-Kernen soll Nvidia überholen Vier KI-Beschleuniger in zwei Jahren, so lautet Metas Ziel. 2027 kommt der MTIA 500 mit 1700 Watt elektrischer Leistungsaufnahme.

Metas KI-Beschleuniger mit RISC-V-Kernen soll Nvidia überholen
#Riscv
heise.de/news/Metas-KI-Beschle…
Vier KI-Beschleuniger in zwei Jahren, so lautet Metas Ziel. 2027 kommt der MTIA 500 mit 1700 Watt elektrischer Leistungsaufnahme.

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TUMCREATE תפתח מעבד RISC-V בקוד פתוח עם קריפטוגרפיה פוסט-קוונטית

TUMCREATE מובילה את QUASAR-CREATE, יוזמת קונסורציום בת 3.5 שנים לבניית מעבד RISC-V בן 64 סיביות בקוד פתוח, הכולל מאיצי PQC משובצי חומרה וסביבות ביצוע מהימנות, המיוצר באמצעות תהליך 180 ננומטר של GlobalFoundries בסינגפור.

#קריפטוגרפיה_פוסט_קוונטית #RISCV #חדשות

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TUMCREATE تطوّر معالج RISC-V مفتوح المصدر بتشفير ما بعد الكم

تقود TUMCREATE مبادرة QUASAR-CREATE، وهي مشروع تحالف يمتد 3.5 سنوات لبناء معالج RISC-V مفتوح المصدر بقدرة 64 بت، مزوّد بمسرّعات تشفير ما بعد الكم مدمجة في الأجهزة وبيئات تنفيذ موثوقة، ويُصنَّع عبر عملية GlobalFoundries بتقنية 180 نانومتر في سنغافورة.

#تشفير_ما_بعد_الكم #RISCV #أخبار

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TUMCREATE, 양자 내성 암호화 기능을 갖춘 오픈소스 RISC-V 프로세서 개발 추진

TUMCREATE가 주도하는 QUASAR-CREATE는 3.5년간의 컨소시엄 이니셔티브로, 하드웨어 내장형 양자 내성 암호화(PQC) 가속기와 신뢰 실행 환경을 탑재한 64비트 오픈소스 RISC-V 프로세서를 개발하며, 싱가포르에서 GlobalFoundries의 180nm 공정을 통해 제조될 예정입니다.

#양자내성암호화 #RISCV #뉴스

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TUMCREATEがポスト量子暗号を搭載したオープンソースRISC-Vプロセッサを開発へ

TUMCREATEは、シンガポールにおいてGlobalFoundriesの180nmプロセスで製造される、ハードウェア組み込み型PQCアクセラレータおよびトラステッド実行環境を備えた64ビットオープンソースRISC-Vプロセッサの構築を目的とした、3.5年間のコンソーシアム・イニシアティブ「QUASAR-CREATE」を主導しています。

#ポスト量子暗号 #RISCV #ニュース

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TUMCREATE 將開發具備後量子密碼學的開源 RISC-V 處理器

TUMCREATE 主導 QUASAR-CREATE 計畫,這是一項為期 3.5 年的聯盟計畫,旨在建構一款開源 64 位元 RISC-V 處理器,內嵌硬體後量子密碼學加速器與可信執行環境,並透過格芯(GlobalFoundries)位於新加坡的 180nm 製程進行製造。

#後量子密碼學 #RISCV #新聞

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TUMCREATE to Develop Open-Source RISC-V Processor with Post-Quantum Cryptography

TUMCREATE leads QUASAR-CREATE, a 3.5-year consortium initiative to build an open-source 64-bit RISC-V processor with hardware-embedded PQC accelerators and trusted execution environments, fabricated via GlobalFoundries' 180nm process in Singapore.

#PostQuantumCryptography #RISCV #News

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Isle.Computer running on ULX3S FPGA dev board connected to monitor showing number guessing game.

Isle.Computer running on ULX3S FPGA dev board connected to monitor showing number guessing game.

Sometimes you need to ship it and call it a night, so I give you 🏝️ Isle.Computer Chapter 6 - Input Output: projectf.io/isle/input-o...

Adds input hardware, uart, Isle edition of FemtoRV "Gracilis" RV32IMC CPU, software library in #riscv asm, Verilator/SDL sim improvements... #FPGA

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SpacemiT K1 (BPI-CM6/BPI-F3) and K3(BPI-SM10) fully Compatible with OpenClaw
docs.banana-pi.org/en/BPI-SM10/...
#riscv #OpenClaw #AI #SpacemiT #K3 #bananapi #opensource #hardware #AIoT

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Avaota F2 Brings Dual-Core RISC-V and 4K Camera Support to Tiny Open-Source Board The compact Avaota F2 board debuts Allwinner's RISC-V V861 processor with 4K camera support, motor control for PTZ applications, and a 1 TOPS AI accelerator in an open-source design.

Avaota F2 Brings Dual-Core RISC-V and 4K Camera Support to Tiny Open-Source Board

#RiscV #Allwinner #SingleBoardComputer #4kCamera #Openwrt

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