La semana pasada nuestro compañero Jair Wells cerró una etapa en la UCIE-INAM, en el que ha demostrado un gran compromiso, profesionalidad y calidad humana, dejando una huella imborrable en el INAM. ¡Te deseamos lo mejor en tus próximos retos profesionales y personales!
#RetoIvaceInnova #FEDER #UCIE

UCIe's Major Technical Components Are Now In Place Version 3.0 of the interconnect standard doubles bandwidth and supports new use cases and enhanced manageability.

While UCIe was initially seen as feature-heavy, many of its management functions are optional, reducing adoption concerns and making the standard more flexible for developers.
semiengineering.com/ucies-major-...
#chiplets #UCIe

Rebellions REBEL-Quad UCIe and 144TB HBM3E Accelerator at Hot Chips 2025 At Hot Chips 2025, we saw a live demo of the Rebellions REBEL-Quad, an AI accelerator with four ASICs, 144GB of HBM3E, and more using UCIe The post Rebellions REBEL-Quad UCIe and 144TB HBM3E Accelerator at Hot Chips 2025 appeared first on ServeTheHome.

UCIe 3.0 Arrives: Chiplet Interconnection Speed Doubled UCIe 3.0 doubles chiplet interconnect speed to 64 GT/s, boosting AI/HPC performance while ensuring backward compatibility.

🚀 UCIe 3.0 Launched: AI/HPC Boom Drives Chiplet Interconnect Bandwidth to Double! Backward-compatible standard spans from mobile devices to data centers. Why no 3D packaging upgrade?
#AI #HPC #UCIe
open.substack.com/pub/chippub/...

UCIe 3.0 Spec Released with Big Speed Up for Chiplets The UCIe 3.0 spec is out with a big speed up for chiplet-based SoC designs by doubling transfer rates and adding new features The post UCIe 3.0 Spec Released with Big Speed Up for Chiplets appeared first on ServeTheHome.

UCIe 3.0 Spec Released with Big Speed Up for Chiplets The UCIe 3.0 spec is out with a big speed up for chiplet-based SoC designs by doubling transfer rates and adding new features The post UCIe 3.0 Spec Released with Big Speed Up for Chiplets appeared first on ServeTheHome.

How to speed up data movement between chiplets with bi-directional data movement, how to minimize signal integrity issues, and what other factors need to be considered.
youtu.be/WkCk2-Ug5lQ?...

#semiconductor #chiplets #UCIe #datamovement

InPsytech Joins Samsung's SAFE™ IP Program to Enhance ONFI and UCIe IP Solutions InPsytech proudly joins the Samsung SAFE™ IP Partner Program, enhancing its ONFI and UCIe solutions, boosting innovation in the semiconductor field.

InPsytech Joins Samsung's SAFE™ IP Program to Enhance ONFI and UCIe IP Solutions #Taiwan #Hsinchu #InPsytech #Samsung_SAFE™ #UCIe

Die-to-die Interconnect Standards In Flux Many features of UCIe 2.0 seen as “heavy” are optional, causing confusion.

UCIe, a standard for die-to-die interconnect in advanced packages, has drawn concern about being too heavyweight with its 2.0 release.
semiengineering.com/die-to-die-i...

#UCIe #chiplets #semiconductor #interconnects