I have a blog now! Like an old school long form one!
Been meaning to set one up forever and then never got around to it until now.
Starting with something small, a little teardown of a cheap Color E-Ink Android tablet: timonsku.zip/bigme-b6-e-i...
Good news for ASIC development with opensource PDKs!! chipfoundry.io
Looking for a tiny RISC-V core that scales with your needs?
We covered FazyRV by Meinhard Kissich in our community spotlight last year: blog.yosyshq.com/p/community-...
Now it's been silicon proven on @tinytapeout.com !
www.linkedin.com/posts/meinha...
go.bsky.app/HHeNEz5
go.bsky.app/8NCEhTw
go.bsky.app/J5RbesE
The ultimate tech talk about the Game Boy
#gb #gameboy #retrocomputing
I'm going to start a regular stream about #opensource silicon. Topics will include design, verification, #fpga, openlane, formal, #tinytapeout, #ASIC bringup, chip validation.
If you're interested, please let me know what days / times work for you:
doodle.com/meeting/orga...
In the mid time, you can try the retrobright method of vintage computers in order to remove the yellow aspect. www.retr0bright.com
The Glasgow - Digital Interface Explorer is now available in stock in our US Store. You can also purchase extra Sync and IO cables and Aluminium Cases! (links included in the Glasgow product description) 1bitsquared.com/products/gla... #GlasgowInterfaceExplorer #opensource #fpga #electronics
My huge beautiful company is so important but also needs more money or it will collapse and die as it is weak and frail but changing the world. Please help me I am so powerful and strong and my company is so good, but also it needs more money than anything else ever has, for reasons of some sort
A die photo of the Pentium chip. An arrow points to a location on the die, with the text "FDIV bug". The chip itself has a complex pattern of circuitry with brownish rectangles and lines of various sizes.
In 1994, a math professor discovered that Intel's Pentium chip sometimes gave the wrong answer when dividing. Fixing this "FDIV" bug cost Intel $475 million. I analyzed the Pentium chip and found the bug. 1/N
"RP2350 introduced a multitude of new hardware security features over the RP2040, and included a Hacking Challenge which began at DEFCON to encourage researchers to find bugs. The challenge has been defeated and the chip is indeed vulnerable..." fahrplan.events.ccc.de/congress/202...
Oh man. They leaned in hard on the security aspects. They knew in September it was faulty. Wanted the disclosure delayed until January. No notice of a 0 day. Whose IP has been vulnerable for months? Hack my stuff please, but if you want a secure platform is any of this ok?
"VPR (pronounced “Viper”) is Nordic Semiconductor’s first RISC-V processor, landing in the new nRF54H and nRF54L lines of SoCs after their initial announcements in April and October of 2023 respectively." danielmangum.com/posts/vpr-no....
Four brown boxes with white labels. The labels indicate they contain Glasgows. Each box contains 50 Glasgows.
This is the final 200 Glasgow shipment for the original Crowd Supply pre-order batch! This finalizes the Crowd Supply campaign! It took a lot of time and effort to get here. Thank you everyone for you trust and patience!
The iCEBreaker FPGA dev board V1.1 is available in the US store right now! Get them while the inventory lasts. The new version features an RGB LED, additional PSRAM chip, USB-C connector, populated “ears”, as well as length matched Pmod signal connections! 1bitsquared.com/products/ice...
Call for SPI flashes at #38C3
I'm developing some SPI-flash tools and want to try a variety of devices and flash chips for testing.
Got devices where it's tricky to dump in-system or rare flash chips? I'd love to test them at #38c3 if you can bring them!
I love tools for electronics. As my present for christmas I just ordered an #Buspirate6 from @buspirate.bsky.social I bought my BPv3.6 many years ago, now its time for an upgrade. I love the community and the level of discussion at the forum where I'm learning a lot of electronics.
fft soc diagram cpu stages and memory map peripherals
Last week spoke at the first annual Soft #RISCV Systems Workshop 🔥 about a #hardware #SoC in #FPGA made using #PipelineC for doing #DSP computing #FFT with custom hardware. Can see slides here (no recording): docs.google.com/presentation... #RISC-V #eda #asic #hls #rtl #hdl #verilog #vhdl
You can download the high resolution image here: github.com/TinyTapeout/...
What's your favourite part?
We love the Zero to ASIC logo and the Oscillating Bones ring oscillator!
enamel wire bodging an IC dead-bug style to a circuit board due to incorrectly designed footprints.
This was one of my most popular tweets, I think mostly due to the clear macro photo I took.
Footprint was P0.5mm vs 0.65mm. So IC couldn't be soldered down. I was able to bodge existing boards in 1-2hrs.
While my friend spent 10min on the redesign (+waiting a week for mfg/ship).
Finally, free time for playing with Glasgow - Digital Interface Explorer #GlasgowExplorer #FPGA
Butterstick open source FPGA development board
ECPBreaker. ECP5 based small development board for FPGA/USB applications
Thermal map generated by Fireflight camera which I developed, next to visual photo from the plane
Packed ICs with RISCV cores inside
Hi đź‘‹
I'm Greg, hardware engineer. I enjoy designing and building open source hardware projects. along with taking macro photos to document the process.
Previously at a startup I used FPGAs and thermal LWIR cameras to map bushfires from aircraft
Currently doing RISC-V ASIC things at IQonIC Works
