My quick note about #Intel
#ArrowLake CPUID C0662 #Skymont
and
#PantherLake CPUID C06C3 #Darkmont
instruction level differences

#AVX_VNNI_INT16 & #AVX10_VNNI_INT enable full 10-digit ASCII->int conversion (0000000000–9999999999) using only two multiplication stages, since 10^n=2^n·5^n and 2^n is just shifts. Non-AI human code
#ArrowLake #LionCove #Skymont
#PantherLake #CougarCove #Darkmont
#NovaLake #PantherCove #ArcticWolf

Strange, according to the Linux-kernel, #ClearwaterForest based on #Darkmont:
github.com/torvalds/lin...

lore.kernel.org/lkml/2025030...
What does CPUID.1Ah.EAX report?
20000003h #Skymont
20000004h #Darkmont

#Intel #Skymont vs. #Darkmont, spot the difference:

#Intel #PantherLake got perfmon support:
github.com/intel/perfmo...
According to this #CougarCove and #Darkmont is similar to #LionCove and #Skymont, just the front-end/branch prediction is different.

New #Intel CPUID dumps:
-2C+10c #Core #Ultra 7 265U B0650 #ArrowLakeU 2P+8E+2LPE, #RedwoodCove + #Crestmont + Crestmont
-6C+10c Core Ultra 9 285H C0652 #ArrowLakeH 6P+8E+2LPE, #LionCove + #Skymont + Crestmont
New #AMD desktop steppings
- #Raphael #Zen4 A60F13 [1]
- #GraniteRidge #Zen5 B40F41 [2]
1/2

#Intel perfmon updated with #PantherLake
CPUID.1Ah.EAX values:
20000000 #Tremont
20000001 #Gracemont
20000002 #Crestmont
20000003 #Skymont
20000004 #Darkmont
40000000 #SunnyCove
40000001 #GoldenCove
40000002 #RedwoodCove
40000003 #LionCove
40000004 #CougarCove
github.com/intel/perfmo...

The undocumented b2h performance counter (uops execution on vector P20/21/22/23 port) in #Intel #Crestmont (even in #MeteorLake) works same way as in #Skymont, making possible direct comparison these cores.
Is this a positive side effect of having both cores in the same #ArrowLakeH product?

I'm only asking because I'm currently working on the #Intel #LionCove / #Skymont port assignment (e.g. this diagram is wrong, vector SQRT/DIV uses V01, not V23), but if there's no interest, I won't bother publishing it.

#Skymont is unaffected
bsky.app/profile/inst...

Unaffected #Intel cores:
#CypressCove in #RocketLake
#WillowCove in #TigerLake
#Gracemont in #AlderLake & #RaptorLake
#Crestmont in #MeteorLake
#Skymont in #ArrowLake

Affected cores:
#GoldenCove in #AlderLake
#RaptorCove in #RaptorLake
#RedwoodCove in #MeteorLake
#LionCove in #ArrowLake

It is worth to mention that #Intel #LionCove and #Skymont in #ArrowLake has similar, but not totally same immediate handling (these can't handle the LEA [r64+imm8/32] cases).

In 0xC5 #Intel #ArrowLakeH, like in 06_AAh, 06_ACh, 06_B5h #MeteorLake and #ArrowLakeU, the CPUID.1Fh topology info is wrong: community.intel.com/t5/Processors/Detecting-LP-E-Cores-on-Meteor-Lake-in-software/m-p/1591719#M71595
But this time the different E/LPE #Skymont / #Crestmont saves the day:1/2

#Intel released the 86th edition of the Software Developer’s Manuals with #GraniteRapids, #SierraForest and #LunarLake:
All-in-One:
cdrdv2-public.intel.com/843820/32546...
Changes:
cdrdv2-public.intel.com/843823/25204...
#RedwoodCove #Crestmont #LionCove #Skymont

New MemLat dumps:
#Intel Core Ultra 5 265K ( #ArrowLakeS, #LionCove, #Skymont) C0662
2/5

New InstLat dumps:
- #Intel Core Ultra 5 265K ( #ArrowLakeS, #LionCove, #Skymont) C0662
#AVX_NE_CONVERT, #AVX_VNNI_INT8, #AVX_IFMA, #CMPCCXADD, #AVX_VNNI_INT16, #SHA512, #SM3, #SM4
- #AMD #Ryzen 9 9950X #GraniteRidge #Zen5 B40F40 256b #AVX512 mode
1/5

New #Intel CPUID dumps:
- #ArrowLakeS 265K CPUID C0662 (with correct #LionCove L0D and L1D notation with associativity info, #Skymont)
- #Timna CPUID 692
GitHub:
github.com/InstLatx64/I...

#Intel #CoreUltra200 #ArrowLakeS #Pcore #Ecore #IPC #TechNews #CPUArchitecture #LionCove #Skymont #NextGenCPU

Intel、Core Ultra 200「Arrow Lake-S」はPコアで9%、Eコアで32%のIPC向上と主張

Intel claims Core Ultra 200 "Arrow Lake-S" improves IPC by 9% on P cores and 32% on E cores
youtu.be/LZy2Wt0674E

#Intel #CoreUltra #ArrowLake #モバイルCPU #リーク情報 #LionCove #Skymont #LunarLake #RaptorLake #CES2024

Intel、Core Ultra 7 255H Arrow LakeモバイルCPUがリーク、旧世代リフレッシュモデルも登場か
youtu.be/CJ45ZuT2xBg